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Messages - FTDI Community

Pages: [1] 2 3 ... 61
1
Hello,

Yes you can use FT4222_SetClock to set the system clock to 80MHz, then use FT4222_SPIMaster_Init and set clock_div to CLK_DIV_2 (1/2 System Clock) which should give 40MHz on SCK.

Please make sure you are using the latest version of LibFT4222:

https://ftdichip.com/software-examples/ft4222h-software-examples/

And reference AN_329 User Guide for LibFT4222.

Best Regards,
FTDI Community

2
Hi,

Could you please contact your local support line at: cn.support@ftdichip.com. They will be able to help you.

Best Regards
FTDI Community

3
Hello,

I can confirmed that the maximum SCK in SPI Master mode is 40MHz.

We will update the UMFT4222EV datasheet.

Best Regards,
FTDI Community

4
Discussion - Software / Re: problem with FT_SetChipConfiguration
« on: May 17, 2024, 11:56:19 AM »
Hi,

The source code for the FT60x Chip Configuration Programmer cannot be given out.

could you please email support1@ftdichip.com? we can then discuss your issue further.

Best Regards
FTDI Community

5
Hello,

This issue has been root caused.

Device manager can show “FTDI CHIP” as the driver provider.
This means that, this driver can be installed by the installer provided in the package.
 
In most of the cases, the installer is not required and WinUSB driver gets installed automatically.

What we have observed is, the issue happens when the installer in the package is executed. The issue is due to GUID mismatch.
The installer package is using a different ID, and this was causing the issue.
 
We have updated the installer files to use the Microsoft default GUID so that the application can work independent of driver version.

The updated package has been uploaded to our SFTP server.
 
1.   Please uninstall the existing drivers from device manager.
2.   Use the drivers from updated package.
3.   Install the drivers either from device manager or by using the installer in the package.

Please contact us if you would like to receive a beta of this update.

Best Regards,
FTDI Community

6
Hi Tony,

Your only option would be to add some external pulldown on the GPIOH pins. Even if they have been set as low and input, if there is no connection they will be pulled high by the internal pullups.

Best Regards
FTDI Community

7
Hi Tony,

The default for these GPIO pins is TriSt-PU. See table 5.1 in FTDI Device Input Output pin States.

what are you planning on connecting the GPIOH pins to? have you tried connecting the pins to a slave device and performing a GPIO read?

Best Regards
FTDI Community

8
Discussion - Software / Re: FT2232hpq
« on: April 10, 2024, 10:20:45 AM »
Hello,

When using LibMPSSE, GPIOL[0:3] can only be used as SPI chip selects.
 
When using LibMPSSE, there is no way to control GPIOL[0:3] as GPIO.
 
LibMPSSE demonstrates controlling the higher line bytes (GPIOH) while using SPI on the lower line bytes using the following functions:
 
FT_WriteGPIO
FT_ReadGPIO
 
If you want to control some of the unused lower line bytes on the same ADBUS as SPI then see AN_411 FTx232H MPSSE I2C Master Example in C which demonstrates GPIO usage with MPSSE using D2xx direct (not using LibMPSSE).
This could be used as a base to understand using both SPI/GPIO in the same code.
OK this example is for I2C but the same principles apply to SPI.

Best Regards
FTDI Community

9
Hello,

Please confirm which version of the D2xx driver and LibFT4222 that you are using?

Are you using custom FT4222H hardware? Do you see the same issue with our UMFT4222EV-D?

Could the I2C slave be at fault rather than the FT4222H I2C master?

When this happens maybe you can perform a software reset rather than having to force quit or restart?
See FT4222_ChipReset API. You can also try these D2xx based APIs:

FT_Purge
FT_ResetDevice
FT_ResetPort
FT_Rescan
FT_Reload
FT_CyclePort

Best Regards,
FTDI Community

10
Hello,

Unfortunately the LibFT4222 source code can't be shared as it's exposes secrets of our vendor class devices.

Please contact us via email on support1@ftdichip.com and we'll contact our R&D team to see if we can provide a 64 Bit (aarch64) build.

Best Regards,
FTDI Community

11
Discussion - Hardware / Re: FT2232HQ adds extra one byte
« on: March 21, 2024, 03:32:52 PM »
Hello,

The extra bytes may be due to lack of biasing on the RS485 transceiver. If you could email into support1@ftdichip.com we can share the RS485 biasing schematic that will be able to help you.

Best Regards
FTDI Community 

12
Hello,

Yes, there are internal pullups on the RXD lines of FT232R and FT232H.

the typical value is 75 KΩ. You can find more information in 5.3 of the FT232H datasheet.

Best Regards
FTDI Community

13
General Discussion / Re: Question
« on: March 14, 2024, 10:52:13 AM »
Hi,

Number 1 is just the general configuration of the device. Number 2 is to enable the GPIOs. Have a look at section 3.1 of AN_412 FT600/FT601 Bridge Chips Integration.

This goes over the configuration modes of FT600 with section 3.1.5 focusing on the GPIO configuration.

We have a FT60x configuration programmer that you can use. You can find it here along with the AN_370 FT60X Configuration Programmer User Guide.

Best Regards
FTDI Community

14
General Discussion / Re: Question
« on: March 14, 2024, 09:41:41 AM »
Hi,

Have a look at section 3.2 of AN_412 FT600/FT601 Bridge Chips Integration, this goes over the abort recovery process.

Any error or timeout requires this abort process before resuming the read/write.

Best Regards
FTDI Community

15
Test and Review Area / Re: LibMPSSE Beta
« on: February 29, 2024, 02:13:46 PM »
Hello All,

LibMPSSE 1.0.5 fixes all known issues and is available on our website:

https://ftdichip.com/software-examples/mpsse-projects/

Best Regards,
FTDI Community

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