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Discussion - Drivers / Re: Does D3XX driver support ARM ?
« on: December 14, 2020, 10:22:56 AM »
Are there any updates on the topic? I am considering to connect FT601 chip to IMX8 CPU, is it possible?
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Hello,
We provide images for the Xilinx Spartan-6, Virtex-6 and Altera Cyclone V. See the following Programming Guides for further information:-
AN_376 - Xilinx FPGA FIFO master Programming Guide
http://www.ftdichip.com/Support/Documents/AppNotes/AN_376 Xilinx FPGA FIFO master Programming Guide.pdf
AN_377 - Altera FPGA FIFO master Programming Guide
http://www.ftdichip.com/Support/Documents/AppNotes/AN_377 Altera FPGA FIFO master Programming Guide.pdf
User Guides for the Data Loopback and Streamer examples may be found here:
AN_375 - FT600 Data Loopback Application User Guide
https://www.ftdichip.com/Support/Documents/AppNotes/AN_375 FT600 Data Loopback Application User Guide.pdf
AN_387 - FT600 Data Streamer Application User Guide
https://www.ftdichip.com/Support/Documents/AppNotes/AN_387 FT600 Data Streamer Application User Guide.pdf
As Im sure you are aware Software examples are here:
http://www.ftdichip.com/Support/SoftwareExamples/FT60X.htm
For API information, please review the D3XX Programmer's Guide
https://www.ftdichip.com/Support/Documents/AppNotes/AN_387 FT600 Data Streamer Application User Guide.pdf
We have an Application Note that describes the FPGA design of an example FIFO master that is interfaced to an FT60x device which may assist you, it’s available here: AN_421 FIFO Bus Mater for FT600 / FT601 - http://www.ftdichip.com/Support/Documents/AppNotes/AN_421_FIFO_Bus_Master_For FT600_FT601.pdf
Please refer to AN_412 FT600/FT601 Bridge Chips Integration - http://www.ftdichip.com/Support/Documents/AppNotes/AN_412_FT600_FT601 USB Bridge chips Integration.pdf. This application note is for designers who want to integrate the FT60x into new designs. As well as this have a look at our FT600Q-FT601Q SuperSpeed USB3.0 IC Datasheet - http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT600Q-FT601Q IC Datasheet.pdf and Technical Note TN_168 FT600_601 Errata Technical Note - Technical Note TN_168 FT600_601 Errata Technical Note . We also have an Application Note that describes the FPGA design of an example FIFO master that is interfaced to an FT60x device which may assist you, it’s available here: AN_421 FIFO Bus Mater for FT600 / FT601 - http://www.ftdichip.com/Support/Documents/AppNotes/AN_421_FIFO_Bus_Master_For FT600_FT601.pdf
If you have further questions it may be easier to direct them to email support here support1@ftdichip.com
Regards,
FTDI Community