General Category > Discussion - Software

FT4222 CLK Settings CPOL/CPHA wrong in user manual?

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emmanuel:
I have an issue where the SPI Master locks up if the FT4222 is configured in the following way:

--- Code: ---    ftStatus = FT_OpenEx("FT4222",FT_OPEN_BY_DESCRIPTION, &ftHandle);
    ftStatus = FT4222_SetClock(ftHandle, SYS_CLK_80);
    ftStatus = FT4222_GetVersion(ftHandle, &ft4222Version);
    ftStatus = FT4222_SPISlave_InitEx(ftHandle, SPI_SLAVE_NO_PROTOCOL);
    ftStatus = FT4222_SPISlave_SetMode(ftHandle, CLK_IDLE_HIGH, CLK_LEADING);
--- End code ---

The SPI Master in my case is an HC16 Motorola MCU.   
I can confirm its SPI Master configuration is:
--- Code: ---CPOL=1, CPHA=1
--- End code ---


When I use the CLK_IDLE_HIGH/CLK_LEADING on the FT4222, the first write from the FT4222 will halt the Master.
If using CLK_IDLE_HIGH/CLK_TRAILING, the Master does not halt.

Looking at the definition for CLK_TRAILING, the bit seems to be swapped with _LEADING.
In my experience, *leading is typically '1' and *trailing is '0';  This is the case for most of my MCU experience.

Have I made a mistake someplace else or is the values set for CLK_LEADING / CLK_TRAILING backwards?

FTDI Community:
Hello,

Please contact email support on support1@ftdichip.com and we will look into your issues further and where appropriate post the outcome here.

Regards,
FTDI Community

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