FTDI Community

General Category => Discussion - Hardware => Topic started by: ppeter on April 14, 2018, 02:12:08 PM

Title: RTS/CTS Flow Control Thersholds
Post by: ppeter on April 14, 2018, 02:12:08 PM

Hello,

there is little information on the RTS/CTS hardware flow control behaviour in the datasheets, e.g. for FT230X.

* At which buffer fill level will RTS be negated, when will it be asserted agian? How quickly has the sender to stop sending/how many bytes can still be sent without loss, even if RTS was negated?
* How many bytes should I expect to receive in a MCU from e.g. FT230X when the converter's CTS line is deasserted, i.e. when should the MCU negate its RTS line to stop the serial converter in time.

Thanks!

Title: Re: RTS/CTS Flow Control Thersholds
Post by: FTDI Community on April 16, 2018, 10:18:20 AM

Hello,

Please see the following links which should help:

How does RTS/CTS flow control work in an FTDI chip?  (http://www.ftdichip.com/Support/FAQs.htm#HwGen3)

Flow Control (http://www.ftdichip.com/Support/Knowledgebase/index.html?an232b_04flowctl.htm)

AN232B-04 Data Throughput, Latency and Handshaking (http://www.ftdichip.com/Documents/AppNotes/AN232B-04_DataLatencyFlow.pdf)

Best Regards,

FTDI Community

Title: Re: RTS/CTS Flow Control Thersholds
Post by: ppeter on April 16, 2018, 12:03:48 PM

This is exactly what I was looking for. Thanks a lot.