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Discussion - Software / MPSSE commands on falling or rising edge?
« on: February 21, 2019, 10:48:01 AM »
Data is typically clocked in and out on clock edges.
Either the rising or falling edge can be used on transmit or receive.
In the 93C46D example, the EEPROM clocks data in and out on the rising edge.
I have my own selected SPI flash component, with clocking in (sampling) data on rising clock edge,
and clocking out data for that particular SPI memory chip on falling edge. Actually, input data is latched in on the rising edge of serial clock (C), and
output data is available from the falling edge of C.
What is confusing is:
(taken form AN_135 FTDI MPSSE Basics Version 1.1)
"In the 93C46D example noted above, the EEPROM clocks data in and out on the rising edge.
In this case, the MPSSE should be configured for data transfer on falling edges for both transmit and receive.
This allows the data out from both the MPSSE and the target device to stabilize before being clocked in on the next edge."
Now, I expect that I have to use opposite: MPSSE should be configured clocking in data on falling edge while clocking out data
on rising edge. But what is the meaning "This allows the data out from both the MPSSE and the target device to stabilize before
being clocked in on the next edge"?
So, is that Ok to follow the logic above to configure MPSSE to latch input data on the rising edge of serial clock (C), and
output data to be available from the falling edge of C.
Either the rising or falling edge can be used on transmit or receive.
In the 93C46D example, the EEPROM clocks data in and out on the rising edge.
I have my own selected SPI flash component, with clocking in (sampling) data on rising clock edge,
and clocking out data for that particular SPI memory chip on falling edge. Actually, input data is latched in on the rising edge of serial clock (C), and
output data is available from the falling edge of C.
What is confusing is:
(taken form AN_135 FTDI MPSSE Basics Version 1.1)
"In the 93C46D example noted above, the EEPROM clocks data in and out on the rising edge.
In this case, the MPSSE should be configured for data transfer on falling edges for both transmit and receive.
This allows the data out from both the MPSSE and the target device to stabilize before being clocked in on the next edge."
Now, I expect that I have to use opposite: MPSSE should be configured clocking in data on falling edge while clocking out data
on rising edge. But what is the meaning "This allows the data out from both the MPSSE and the target device to stabilize before
being clocked in on the next edge"?
So, is that Ok to follow the logic above to configure MPSSE to latch input data on the rising edge of serial clock (C), and
output data to be available from the falling edge of C.