Hi, I'm developing FPGA based audio interface that requires very short roundtrip, and currently I'm stuck with driver performance at small buffer size.
Audio data frame is 64 bytes and I need to minimize its path to PC (win 10) and back.
The problem is that driver, it seems, has internal FIFO that is always kept filled.
I'm estimating this value based on counter looped through device, that is copied on device side from received buffer.
Count of buffers stuck between application and device is near 4100 +-1, so, given 64 bytes sample size it is likely there is 4100*64 buffer somewhere on the data path. With 62500 sample rate it gives above 3ms latency (in each direction), which is inacceptable for the project.
Is there a way to reduce internal buffer size?
I really believe such data processing scenario is possible at least on driver side, audio hardware usually have that low latency even on usb2 interfaces.