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BT815 Image Issue

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gokhannsahin:
Hi everyone,
I was using FT813 in my project but migrated it to BT815 today. The two projects are using the same images.
The screen of one that is with FT813 is very well but BT815 has lots of white pixels. (PALETTED8 has been used)
I enclosed the screens of them, you can see the difference. Why?
Hsync,vsync,disp pins of FT813 etc. has a series resistors at your example schematic of the datasheet.
However, there is no a series resistor in BT815 datasheets. Can this problem cause related to these resistors?
Furthermore, I have two different TFT in my project, one is 7" and other is 4.3". 7" can display my design screen but 4.3" is an empty page.
4.3" also needs these resistors?
Finally, in the startup, BT815 is slower than FT813, the difference is around 1-1,5 second. Why? BT815 is checking something in the startup?
(The embedded codes are the same for them)


FTDI Community:
Hello,

Can I get you to use the EVE Asset Builder to convert your images using the BT81X specific functionality:
https://www.ftdichip.com/Support/Utilities.htm#EVE%20Asset%20Manager
Once completed, please let me now if the results are the same.

I don't believe this issue is related to these resistors, although can you clarify if you are using our Development Modules or a custom hardware design?

You should ensure that your display setting for the 4.3" display are correct.

Best Regards,
FTDI Community

gokhannsahin:
Hi,
The result is the same, it has white pixels.
I think the display settings are correct because when a series resistor is connected to VSYNC and HSYNC pins, it displays the screens.
The settings parameters;

--- Code: ---#define settingQVGALCDPARAMETER \
{ \
480U, /* Active width of LCD display */ \
272U, /* Active height of LCD display */      \
548U, /* Total number of clocks per line */   \
43U, /* Start of active line */    \
0U, /* Start of horizontal sync pulse */    \
41U, /* End of horizontal sync pulse */    \
292U, /* Total number of lines per screen */  \
12U, /* Start of active screen  */    \
0U, /* Start of vertical sync pulse */    \
10U, /* End of vertical sync pulse */    \
5, /* Pixel Clock */      \
0, /* Define RGB output pins */    \
1, /* Define active edge of PCLK */    \
} \
--- End code ---

Also, I enclosed the display parameters which in the datasheet of TFT.

FTDI Community:
Hello,

Can you just clarify which of the two displays you are using is exhibiting this issue? and can you link the datasheet? Also are you using a custom hardware design or our modules?

Best Regards,
FTDI Community

Rudolph:
I wish I had a BT815 module yet. :-)

>Finally, in the startup, BT815 is slower than FT813, the difference is around 1-1,5 second.

Seconds? That would be awfull compared to the less than 200ms of a BT813.

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