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General Category => Discussion - Software => Topic started by: josh on June 28, 2018, 02:37:06 AM

Title: Question about FT4222 GPIO pin
Post by: josh on June 28, 2018, 02:37:06 AM

Hi,
Consider these 3 successive function calls:

FT4222_GPIO_Write(ftHandle, GPIO_PORT0, 0);
FT4222_GPIO_Write(ftHandle, GPIO_PORT0, 1);
FT4222_GPIO_Write(ftHandle, GPIO_PORT0, 0);

This is how I output a pulse in GPIO pin 0. The logic analyzer shows that when I do this, the GPIO port 0 signal remains high for 200 us which is too long for my app. How can I control for how long the signal will be 1?

Thanks.

Title: Re: Question about FT4222 GPIO pin
Post by: FTDI Community on June 28, 2018, 10:18:31 AM

Hello Josh,

The GPIO Library functions were not designed to provide specific pulse widths, there were design to be as general purpose as possible. In fact each Library function call is likely to be sent to the IC in a separate USB frame, of which the minimum frame time is 125uS for a High Speed Device. This will be the cause of the 200uS pulse you are seeing on your logic analyser.

The follow Application Notes may be helpful.
What is USB:
http://www.ftdichip.com/Support/Documents/TechnicalNotes/TN_110%20What%20is%20USB.pdf (http://www.ftdichip.com/Support/Documents/TechnicalNotes/TN_110%20What%20is%20USB.pdf)

FTDI USB Data Transfer Efficiency:
http://www.ftdichip.com/Support/Documents/TechnicalNotes/TN_103_FTDI_USB_Data_Transfer_Efficiency(FT_000097).pdf (http://www.ftdichip.com/Support/Documents/TechnicalNotes/TN_103_FTDI_USB_Data_Transfer_Efficiency(FT_000097).pdf)

Data Throughput, Latency & Handshaking:
http://www.ftdichip.com/Support/Documents/AppNotes/AN232B-04_DataLatencyFlow.pdf (http://www.ftdichip.com/Support/Documents/AppNotes/AN232B-04_DataLatencyFlow.pdf)

Optimising D2XX Data Throughput:
http://www.ftdichip.com/Support/Documents/AppNotes/AN232B-03_D2XXDataThroughput.pdf (http://www.ftdichip.com/Support/Documents/AppNotes/AN232B-03_D2XXDataThroughput.pdf)

Best Regards,
FTDI Community