FTDI Community

General Category => Discussion - Hardware => Topic started by: Jaholmes on December 02, 2019, 05:31:45 PM

Title: 245 FIFO modes: Ok for WR to remain high between writes? (FT240X, FT245)
Post by: Jaholmes on December 02, 2019, 05:31:45 PM
I'm building a USB sensor application using discrete logic--no MCU or CPU.  I have a few candidate designs drawn up, and noticed that I could simplify things if it was permissible to keep WR normally high, then pulse low-high to write.  Datasheets for the FT240X and FT245 are a bit ambiguous about this.  I should mention that I'm also reading bytes, so RD must also being pulsed low-high periodically.  Can this happen while WR is held high--without anything bad happening?  Or must WR be low to read?  I'd guess it would be ok, but figure I ought to put it out there just in case.

Very best,