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Messages - gregg

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Discussion - Software / Can RD# be shorted to OE# in Sync 245 FIFO?
« on: March 28, 2022, 07:50:00 PM »
I have understood the purpose of both RD# and OE# but they seem to be redondant in the logic of sync 245 fifo. OE# is pulled down by the FPGA one cycle before RD# so they are moving low in synchronization (with one cycle difference).

Can RD# be shorted to OE#? The FPGA will obviously know that the valid byte comes one cycle after the low event. And they go up at the same time which doesn't impact the FPGA and hopefully shouldn't confuse the FTDI chip.

The purpose of this operation is to save one pin on the FPGA side.

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Discussion - Software / How to control ACBUS[8-9] in Sync 245 FIFO?
« on: March 24, 2022, 04:33:50 PM »
All datasheets of FT2xx seem to imply that it's possible to control ACBUS8 ACBUS9 in sync 245 FIFO. See attached screenshot of the datasheet table.

I would like to know what is the real possibility of the hardware for ACBUS[8-9] in sync 245 FIFO mode? Is it possible to control those two lines?

From the software point of view with libd2xx, it seems that you can only control those 2 lines with setbitmode in ACBUS bit-bang mode 0x20 while sync 245 FIFO is 0x40 mode.

I'm using my own software and I'm talking directly to the chip with libusb so I'm not bounded by libd2xx. In sync 245 FIFO mode and without interrupting this mode, is it possible to do something with ACBUS[8-9] as it's implied by the datasheets because those lines are listed for the sync mode?

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