Hello,

Thanks for your post.

I believe that you have also contacted email support where we will continue to deal with your issue and post any resolution here.

Regards,
FTDI Community

Hello,

The FT260 can't be made to appear as a keyboard.

The source code for the keyboard example for the FT9xx MCU is available. It's included as part of the FT9xx Toolchain:

C:\Users\Username\Documents\Bridgetek\FT9xx\2.5.0\Examples

Best Regards,
FTDI Community

Hello,

Unfortunately FTDI do not offer that services, but hopefully one of the other forum members can help you out!

Best Regards,
FTDI Community

Hello,

It is not possible to shorten this time unfortunately as the end of the transfer is sent over a separate USB frame after the end of the data and so there is always a gap of more than one USB frame interval.

Best Regards,
FTDI Community

Hello,

Since this is not one of our products, although it utilises our device, I am unable to support it.
Product Manufacturers are responsible for supporting end-users of their products, so you will need to contact μFR.
FTDI cannot control how the USB ICs are used and often has no knowledge of the entire product.
Please see the following document for reference:

http://www.ftdichip.com/Support/Documents/TechnicalNotes/TN_102_OEM_Technical_Support_Requirements_for_FTDI_Products.pdf

It does sound though like the FTDI IC being used in this product is working correctly, as you are able to access and issue D2XX commands to the IC and they return without error.

Best Regards,
FTDI Community

Hello,

Perhaps due to unaligned read/write.

An aligned write is a write on the FIFO interface with all byte enables selected, i.e. on a 16-bit interface, an aligned write is 16-bits wide and on a 32-bit interface, an aligned write is 32-bits wide.
 
An unaligned write is a write on the FIFO interface that is not as wide as the interface, i.e. on a 16-bit interface, an unaligned write is a single byte write and on a 32-bit interface, an unaligned write is 1, 2, or 3 bytes.
 
An aligned read is a read from the FIFO interface when the slave asserts all byte enables. On a 16-bit interface, an aligned read is 16-bits wide and on a 32-bit interface, an aligned read is 32-bits wide
 
An unaligned read is a read from the FIFO interface that is not as wide as the interface, i.e. on a 16-bit interface, an unaligned read is a single byte read and on a 32-bit interface, an unaligned read is 1, 2, or 3 bytes. An unaligned read from the slave always signals that it is a short packet

Further details can be found in AN_421 - https://www.ftdichip.com/Support/Documents/AppNotes/AN_412_FT600_FT601%20USB%20Bridge%20chips%20Integration.pdf

Regards,
FTDI Community

Hello,

In 245 Synchronous FIFO mode the TXE_N is an output signal, Transmit FIFO Empty. It is active low and when active it indicates the Transmit FIFO has space and it is ready to receive data from the FIFO master. It indicates there is a minimum, or at least 1 byte of space available.

By the way if you contact support1@ftdichip.com we have a new driver I can provide to you.

Thanks,
FTDI Community

Hello,

Please refer to AN_395 User Guide for LibFT260.

There are also software examples provided with LibFT260 download.

Best Regards,
FTDI Community