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Discussion - Hardware / Re: FT600/601 Question about maximum data rate (practical)
« on: June 17, 2021, 05:04:15 PM »
Hi Bob. Yes, we have solved our issue. I don't remember quite well which was the puntual solution. I have some recomendations here that perhaps can help you:
1. You should program one long USB session (one call of the FT_Read
API) or queue appropriate number of the asynchronous FT_Read. You must
have queued transfers in D3xx/driver at any time. The ulBufferLength
parameter in FT_ReadPipe can be set to be able to deliver block of data
at constant rate. Try
ulBufferLength = 262144 or 65536 or >262144.
2. You must add memory buffer, e.g. FIFO, RAM, in FPGA side. It
prevents data loss when writes to FT60x are temporary impossible due to
USB protocol or USB transfers management in software. The connection I
tested was with 80 kB additional FIFO buffer and queued transfers (Fig.
6). For 100 MB/s the buffer size may be smaller. Try 32-64 kB.
3. FPGA master should write data in burst transactions with the size of
4096 B (245 mode, 1 EP IN, 1 EP Out). It is pointed in FTDI
application notes. The transfer is finished when short packet is
written to FT60x. If you write e.g. 4 samples 32-bit, stop, write
again, it is impossible to achieve 100 MB/s throughput.
4. For the best throughput, consider the FT_StreamPipe API. Transfer
switching is more lightweight when this function is used. But
additional memory buffer was still required.
5. Some steps to synchronize OS environment and the application may be
required. Consider continuous work with dummy data at the beginning and
valid data streaming after command trigger.
Two years ago I found a paper called "An Universal USB 3.0 FIFO Interface For Data Acquisition" by Krzysztof Mroczek and I wrote to him and he gave me those recomendations.
Best regards,
SR
1. You should program one long USB session (one call of the FT_Read
API) or queue appropriate number of the asynchronous FT_Read. You must
have queued transfers in D3xx/driver at any time. The ulBufferLength
parameter in FT_ReadPipe can be set to be able to deliver block of data
at constant rate. Try
ulBufferLength = 262144 or 65536 or >262144.
2. You must add memory buffer, e.g. FIFO, RAM, in FPGA side. It
prevents data loss when writes to FT60x are temporary impossible due to
USB protocol or USB transfers management in software. The connection I
tested was with 80 kB additional FIFO buffer and queued transfers (Fig.
6). For 100 MB/s the buffer size may be smaller. Try 32-64 kB.
3. FPGA master should write data in burst transactions with the size of
4096 B (245 mode, 1 EP IN, 1 EP Out). It is pointed in FTDI
application notes. The transfer is finished when short packet is
written to FT60x. If you write e.g. 4 samples 32-bit, stop, write
again, it is impossible to achieve 100 MB/s throughput.
4. For the best throughput, consider the FT_StreamPipe API. Transfer
switching is more lightweight when this function is used. But
additional memory buffer was still required.
5. Some steps to synchronize OS environment and the application may be
required. Consider continuous work with dummy data at the beginning and
valid data streaming after command trigger.
Two years ago I found a paper called "An Universal USB 3.0 FIFO Interface For Data Acquisition" by Krzysztof Mroczek and I wrote to him and he gave me those recomendations.
Best regards,
SR