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Messages - BoardMan

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My requirement is to get the data from FT2232H using external clock on 22MHz. The clock accuracy is very important. That is why it is required to be external clock driven by the external device. The sync mode of FT2232H use extremely high clock (60MHz). The async mode is too slow. The async mode of the 2232H seems to be the perfect implementation but the specification limit the read speed up to 8MB/s (no more than 8MHz clock). That is why I'm searching for a buffering solution because in synchronous mode the FT2232H generates the clock and also the external device will generate it own 22MHz clock. The external data buffer will be filled by 60MHz and will be read by 22MHz clock.  But when it fills I need of a solution to stop the data that goes to the external buffer.

2
Thanks for your answer. The idea is to attach another dual port FIFO for clock synchronisation and when the external FIFO is full to drive the RD# signal (using some of the flags /FF /EF /HF). In theory it had to work correctly but is there any worry about data loss?

3
Hi,

I'm in a process of designing high speed communication channel from PC to external device connected to FT2232H using synchronous fifo mode (FT245 style). The requirement is to fetch data from the fifo by external clock (about 22MHz) generated by the device. The data in sync mode is controller by a 60MHz clock generated by the FT2232H.

My question is can I use the RD# signal as flow control? For example to set the RD# signal high to block the FIFO reading? And when the device is ready to receive the next byte to drive the RD# to low and read the current byte in the fifo at the next rising edge of the 60MHz CLK OUT.

I suppose that when driving the RD# high and if there exists data in the fifo, the RXF# will stay in low state.

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