I've been working with FT2232H a lot but I don't use FTDI drivers, instead I work directly through libusb.

1. Does FT2232H support 30MHz at JTAG-TCK?

IIRC, yes, I think I measured it at some point.

2. Is it required for platform to provide 60MHz clock to FTDI or 12MHz crystal is sufficient? Or any other hardware change required?

12 MHz crystal is sufficient, nothing else is needed in HW.

3. Any reference driver/test to enable FT2232H JTAG TCK operating at 30MHz?

These are notes from my code:

Master clock is 60 MHz after /5 clock divider is disabled
required_clock = master_clock / (2 * (divider + 1))
divider = master_clock / required_clock / 2 - 1

If you set it to 30 MHz but actually measure 6 MHz then the /5 clock divider is enabled.

Reversing (swapping) of UART RX and TX is not possible in the FT2232H

Is there a document describing differences between the old FT232H/FT2232H/FT4232H and the new chips?
E.g. is the availability of Type-C/PD3.0 Controller is the only difference with all the rest being exactly the same?

Try UrJTAG

It's a known phenomenon in electronics: unpowered chip gets powered trough its internal ESD protection diodes when its signals are driven high.
The right way to deal with it is to use buffers with so-called Ioff feature (e.g. TI SN74AUP1G34) or a dual-supply voltage translators (e.g. ON FXMA2102).
Using series high-value resistors is not ideal as it will make signal edges very slow.

Could FTDI please let us know if they are going to release new devices similar to FT232H, FT2232H, FT4232H in the future?

My ideal devices would be:

- High-speed USB
- 1, 2, 4, 8 channel device variants
- UART, MPSSE, bit bang on every channel
- xDBUS[7:0] ports only, no need for xCBUS[7:0] ports
- At least 8 kByte RX FIFO buffer and 8 kByte TX FIFO buffer for each channel
- At least 100 MHz internal clock (vs the current 60 MHz)
- Each port pin shall be independently configurable as open-drain
- Support for all SPI modes
- Support for I2C clock stretching
- Support for I2C multi-master
- Small QFN package with 0.5 mm pin pitch

Pinouts for FT232H, FT2232H, FT4232H MPSSE

Pin        JTAG  SPI   I2C
D0, output TCK   SCK   SCL
D1, output TDI   MOSI  SDAO
D2, input  TDO   MISO  SDAI
D3, output TMS   SS#   no connection