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Author Topic: Understanding FT232H buffer behavior  (Read 3780 times)


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Understanding FT232H buffer behavior
« on: April 16, 2019, 03:46:15 PM »


I am currently trying to interface an FT232H with a ti microcontroller using the FT245 asynchronous interface. To optimize the throughput, I am trying to understand which buffers are involved when reading or writing to the FT232H.

Here is what I do not understand: The FT232H has two 1Kb read and write buffers. How is it possible to generate 64KByte USB packets from these buffers? For example, I am able to send a 64KByte USB packet from the PC host to the FT232H. I can see that this actually happens using Wireshark. This packet should pass over the wire in 1ms, correct? However, my processor needs 8.5ms to read this packet from bridge chip. How is this possible? Where is the data buffered during this time?

Thank you very much and best regards,


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Re: Understanding FT232H buffer behavior
« Reply #1 on: April 23, 2019, 09:05:03 AM »

AFAIK the USB bulk transfers (512 bytes packets in High Speed mode) are used for actual data exchange. Any amount of data may be sent to OUT endpoint as USB subsystem on the host computer handles this automatically: device sends NAK on the OUT endpoint when its buffer gets full and the host computer reschedules the data delivery. Therefore there is no need to split write data in 512 byte chunks. And the data is buffered on the host computer. Same for the IN endpoint: host computer buffers data until either its size reaches the limit you've requested (e.g. 64 kB) or a timeout occurs.