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[apleader]

Hello!

I am currently trying to get a video stream from an FPGA to a Windows 10 computer via USB. Therefore I got both the FT602 and Altera Cyclone V CGX evaluation boards and connected them via HSMC. I loaded the test Verilog files on the FPGA, according to https://www.ftdichip.com/Support/Documents/AppNotes/AN_434_FT602_UVC_Bus_Master_Sample.pdf.

The FT602 board is connected via a USB 2.0 cable to a Windows PC (directly to the PC, no USB Hub), where I want to display the video stream. But neither VLC (recommended in the mentioned pdf) nor the Windows Camera app show a picture, both applications throw error messages.

The FT602 is configured to 600 FIFO mode with 4 video channels enabled. All video settings were left untouched, I2C is enabled.

As far as I understood the FT602 data sheet (http://www.farnell.com/datasheets/2282665.pdf), the chip should set the WR_N pin to low when ready to receive data, but that never happens.

Any help appreciated!

[FTDI Community]

Hello,

Are you connecting to a USB 3.0 Host port on your host PC? If so do you notice any difference if you use a USB 3.0 cable rather than a USB 2.0 cable?

Also, you mention that you encounter some error messages, can you provide some details on these error messages please?

Regards,
FTDI Community

[apleader]

Hello!

The error message displayed by VLC: Capture failed: The capture device "FTDI Superspeed Video Channel 1" does not support the required parameters.
   Windows Camera: 0xA00F4241<CameraSwitchFailed> (0cC00D5212)

When enabling all four video channels, theses error messages also applies to the second channel ("FTDI Superspeed Video Channel 2"), channels three and four do not display error messages, but also provide no video (black screen with Windows Camera, warning cone (logo) with VLC).


The USB 2.0 cable is connected to an USB 3.0 port, I currently have no USB 3.0 cable available, but this will change soon.

[FTDI Community Admin]

Hello,

The issue is most likley to be the cable, can you try a USB 3.0 certified cable?

Regards,
FTDI Community

[apleader]

Hello!

I just tried an USB 3.0 cable, the test program works now, albeit only channel 3 and 4 (probably messed something up with the configuration of channel 1 and 2, also the LED which indicates that frames are dropped is flashing permanently when viewing video from channel 3 and 4). But I was not able to reproduce the Verilog code to generate my own test patterns. So I have some questions:
1) How is a USB package containing a video frame set up? The datasheet (https://www.ftdichip.com/Support/Documents/AppNotes/AN_434_FT602_UVC_Bus_Master_Sample.pdf) says that each frame starts with the header 0x0000_820C, 0xBABE_FACE, 0xBABE_FACE and ends with 0x55. It also states that the termination byte (0x55) is not sent to the USB host. But how does the FT602 know whether a received 0x55 is just another pixel data or the end of the frame?
2) The BE bus tells the FT602 how many bytes on the DATA bus are valid. Does this apply only to actual pixel data or also to header bytes?
3) How does the pattern generator tell the USB host that a pixel line of the frame is transmitted completely (hysnc)?
4) What is communicated via the I2C bus?

Thank you for your fast and helpful replies!

[FTDI Community]

Hello,

Great thanks for letting me know that after trying a USB 3.0 cable you were able to get your test program partially working.

To continue support please contact support at the following email address:- support1@ftdichip.com.

Regards,
FTDI Community