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Author Topic: FTDI GPIO parasitic current  (Read 633 times)


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FTDI GPIO parasitic current
« on: April 06, 2020, 10:45:35 PM »


I am using FT232R in an application where the chip may not have power. In this case, there is a signal which is pulled-up connected to CBUS3. Could this pull-up parasitically power on the chip?


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Re: FTDI GPIO parasitic current
« Reply #1 on: April 08, 2020, 04:54:59 PM »

Hello Jeff,

Power should always be applied to the device when in use.
VCC and VCCIO should be applied at the same time.

When the board is powered off, do not apply any voltages to the IC pins.
There might be some current draw but this is not specified because the device can be in unknown states.

It may be advisable to add a buffer or MOSFET gated with PWREN# to avoid such behaviour.

Best Regards,
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