Hi,
if you compile the file below the same way as in my previous post:
/*********************************************************************************
*********************************************************************************/
rom unsigned char DevsDefs[] =
{
0x08, 0x10, 0x00, 0x01, 0x00, 0xe6,
};
unsigned short vID;
unsigned long idx;
/*********************************************************************************
*********************************************************************************/
void main(void)
{
for (;; );
}
/********************************************************************************/
/********************************************************************************/
void cmd_def()
{
vID = (DevsDefs[idx++] << 8 ) | DevsDefs[idx++];
}
/********************************************************************************/
/********************************************************************************/
it will produce this incorrect code between the 0x00440 and 0x0048a addresses:
003c0 fa00 03e0 JUMP 0x003e0
003c2 fa00 03c0 JUMP 0x003c0
003c4 fa00 03be JUMP 0x003be
003c6 fa00 03c0 JUMP 0x003c0
003c8 fa00 03c0 JUMP 0x003c0
003ca fa00 03c0 JUMP 0x003c0
003cc fa00 03c0 JUMP 0x003c0
003ce fa00 03c0 JUMP 0x003c0
003d0 de00 0000 0000 0000 CMP32 0x0000 $0x00000000
003d4 0000 NOP
003d5 0000 NOP
003d6 0000 NOP
003d7 0000 NOP
003d8 2e78
003d9 7a79
003da 0000 NOP
003db 0000 NOP
003dc 0000 NOP
003dd 0000 NOP
003de 0000 NOP
003df 0000 NOP
003e0 b028 0001 OUTPORT 0x028 $0x01
003e2 bc00 3ffc INPORT 0x000 0x3ffc
003e4 3204 3ffc SHR8 0x3ffc $0x04
003e6 da01 3ffc CMP8 0x3ffc $0x01
003e8 fa40 0408 JNZ 0x00408
003ea b00f 0000 OUTPORT 0x00f $0x00
003ec b080 0012 OUTPORT 0x080 $0x12
003ee b088 000f OUTPORT 0x088 $0x0f
003f0 b089 00f0 OUTPORT 0x089 $0xf0
003f2 b084 0000 OUTPORT 0x084 $0x00
003f4 b085 0000 OUTPORT 0x085 $0x00
003f6 b08a 00ff OUTPORT 0x08a $0xff
003f8 b08b 003f OUTPORT 0x08b $0x3f
003fa b081 0001 OUTPORT 0x081 $0x01
003fc c883 0000 PORTTST 0x083 $0 Z
003fe fa40 03fc JNZ 0x003fc
00400 b080 0000 OUTPORT 0x080 $0x00
00402 b088 0000 OUTPORT 0x088 $0x00
00404 b089 0000 OUTPORT 0x089 $0x00
00406 b083 00ff OUTPORT 0x083 $0xff
00408 2600 3ffa 0916 0000 LD32 0x3ffa $0x00000916
0040c 3201 bffa SHR32 0x3ffa $0x01
0040e 2400 3ffe 0000 LD16 0x3ffe $0x0000
00411 2400 3ff8 001e LD16 0x3ff8 $0x001e
00414 3201 7ff8 SHR16 0x3ff8 $0x01
00416 dc00 3ff8 0000 CMP16 0x3ff8 $0x0000
00419 fa1c 042a JLE 0x0042a
0041b 2d01 3ffa 3ffe CPYROM (0x3ffe) 0x3ffa $01
0041e 6c00 3ffe 0002 ADD16 0x3ffe $0x0002
00421 6e00 3ffa 0001 0000 ADD32 0x3ffa $0x00000001
00425 6c20 3ff8 0001 SUB16 0x3ff8 $0x0001
00428 fa00 0416 JUMP 0x00416
0042a 2600 3ffc 0000 0000 LD32 0x3ffc $0x00000000
0042e 2600 3ff8 0000 0000 LD32 0x3ff8 $0x00000000
00432 0a00 0000 SP_LOAD $0x0000
00434 fa00 043d JUMP 0x0043d
00436 0000 NOP
00437 0000 NOP
00438 0000 NOP
00439 0000 NOP
0043a 1008
0043b 0100 CPYF Z Z
0043c e600
0043d fa00 043d JUMP 0x0043d
0043f 0006 RTS
00440 f200 800c PUSH32 0x000c
00442 f200 8010 PUSH32 0x0010
00444 2600 0004 0001 0000 LD32 0x0004 $0x00000001
00448 3e00 8004 0020 000c SHR32 0x000c 0x0020 0x0004
0044c 2600 0010 043a 0000 LD32 0x0010 $0x0000043a
00450 7400 8010 000c ADD32 0x000c 0x0010
00453 2c01 000c 0000 CPYROM 0x0000 0x000c $01
00456 fa52 045a JNF1 0x0045a
00458 3208 4000 SHR16 0x0000 $0x08
0045a 4400 0000 0010 CPY8 0x0010 0x0000
0045d 4400 0010 0000 CPY8 0x0000 0x0010
00460 4e00 0000 00ff 0000 AND32 0x0000 $0x000000ff
00464 2600 0004 0008 0000 LD32 0x0004 $0x00000008
00468 3e20 8004 0000 0010 SHL32 0x0010 0x0000 0x0004
0046c 2c01 000c 0000 CPYROM 0x0000 0x000c $01
0046f fa52 0473 JNF1 0x00473
00471 3208 4000 SHR16 0x0000 $0x08
00473 4400 0000 000c CPY8 0x000c 0x0000
00476 4e00 000c 00ff 0000 AND32 0x000c $0x000000ff
0047a 5440 8010 000c OR32 0x000c 0x0010
0047d 8201 8020 INC32 0x0020 $0x01
0047f 8201 8020 INC32 0x0020 $0x01
00481 8201 8020 INC32 0x0020 $0x01
00483 4400 400c 001e CPY16 0x001e 0x000c
00486 f380 0010 POP32 0x0010
00488 f380 000c POP32 0x000c
0048a 0006 RTS
0048b 0000 NOP
0048c 0000 NOP
0048d 0000 NOP
0048e 0000 NOP
0048f 0000 NOP
00490 0000 NOP
00491 0000 NOP
00492 0000 NOP
00493 0000 NOP
00494 0000 NOP
00495 0000 NOP
00496 0000 NOP
00497 0000 NOP
00498 0000 NOP
00499 0000 NOP
0049a 1808
0049b 150f
0049c 2438 e4d7 0025 LD16 0x24d7 $0x0025
The idx variable is incremented by 3 instead of 2.
The second jnf1 instruction should be jf1 and it lack of a second shr32 instruction.
Willy.
