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Author Topic: V2DAP in FIFO mode possible with VNC2-32 pin package  (Read 620 times)

xenon68

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V2DAP in FIFO mode possible with VNC2-32 pin package
« on: May 27, 2022, 09:14:31 PM »

In the V2DAP.c source, there is the IO configuration for the VINCULUM_II_32_PIN.  There is no code for using the 32pin device in the FIFO  " monInterface == FIFO"

The datasheet shows you can configure all the fifo data pins for bit0 to bit7.  As well as the 4 control lines.

In order to do this, d0 is configured to use pin 11 --->   vos_iomux_define_bidi(11, IOMUX_IN_FIFO_DATA_0, IOMUX_OUT_FIFO_DATA_0);
         
But the issue appears to be that the Debug pin is also using the pin 11 on the 32 pin VNC2. So when I run the code, the d0 line always stays high.   Is it possible to disable the debugger from using the pin 11 so that it can be configured as bit 0 of the FIFO?

This is how I have configured the 32pin device in the v2dap.c source:
vos_iomux_define_bidi(11, IOMUX_IN_FIFO_DATA_0, IOMUX_OUT_FIFO_DATA_0);
vos_iomux_define_bidi(12, IOMUX_IN_FIFO_DATA_1, IOMUX_OUT_FIFO_DATA_1);
vos_iomux_define_bidi(14, IOMUX_IN_FIFO_DATA_2, IOMUX_OUT_FIFO_DATA_2);
vos_iomux_define_bidi(15, IOMUX_IN_FIFO_DATA_3, IOMUX_OUT_FIFO_DATA_3);
vos_iomux_define_bidi(23, IOMUX_IN_FIFO_DATA_4, IOMUX_OUT_FIFO_DATA_4);
vos_iomux_define_bidi(24, IOMUX_IN_FIFO_DATA_5, IOMUX_OUT_FIFO_DATA_5);
vos_iomux_define_bidi(25, IOMUX_IN_FIFO_DATA_6, IOMUX_OUT_FIFO_DATA_6);
vos_iomux_define_bidi(26, IOMUX_IN_FIFO_DATA_7, IOMUX_OUT_FIFO_DATA_7);

// RXF# -> Pin 41
vos_iomux_define_output(29, IOMUX_OUT_FIFO_RXF_N);
// TXE# -> Pin 42
vos_iomux_define_output(30, IOMUX_OUT_FIFO_TXE_N);
// RD# -> Pin 43
vos_iomux_define_input(31, IOMUX_IN_FIFO_RD_N);
// WR -> Pin 44
vos_iomux_define_input(32, IOMUX_IN_FIFO_WR_N);

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