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Author Topic: SPI Slave  (Read 115 times)


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SPI Slave
« on: March 03, 2023, 05:39:09 PM »


I am using FT4222H-SPI-Slave to send data to an SPI-Master. As you know FT4222H-SPI-Slave appends a dummy byte (0x00) at the first byte automatically.

The master word size is 32-bit, so first I send 3 dummy bytes (0x000000), and then I send the actual data (I want the master to receive first a whole dummy word and then receive the actual data).

So I use FT4222_SPISlave_Write() twice and then notify the master to receive the data, as follows:
1. Call FT4222_SPISlave_Write() to buffer the 3 dummy bytes
2. Call FT4222_SPISlave_Write() again to buffer the actual data (two words: 0xAAAAAAAA, 0xBBBBBBBB)
3. Notify the master to receive the data

1. If the master receives the 3 words from FT4222H-SPI-Slave in one transaction, then it receives { 0x00000000, 0x00000000, 0x00000000 }
2. But if I modified the master code to receive each word in a separate transaction, then it receives { 0x00000000, 0x00AAAAAA, 0xAABBBBBB }

Question-1: Why FT4222H-SPI-Slave doesn't send the data correctly in the one transaction manner?
Question-2: Why FT4222H-SPI-Slave appends a dummy byte in the second word (0x00AAAAAA) in the multiple transactions manner?

Kindly, find attached the analyzer screenshots.

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Re: SPI Slave
« Reply #1 on: March 07, 2023, 04:33:07 PM »


If you use FT4222_SPISlave_Write() to write SPI slave data it will append 0x00 in every time the API FT4222_SPISlave_Write() is called.

You can also try to replace FT4222_SPISlave_Write() with FT_Write() as it does not append 0x00 at the beginning.

There are only two USB FIFOs to store the data from PC Host and each FIFO is 512 bytes (but status bytes occupy 2 bytes).
When the API FT_Write() is called, it will send a bulk transfer.
If the transfer size is <512 , it will be treated a short packet transfer and occupy one USB buffer.
If the transfer size is >=512 and <=1024, it will be treated two packets transfer and occupy two USB buffers.
SPI Slave is a passive transfer.
Also make sure the SPI Master sends the clock and do not let the buffer overflow.

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