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Discussion - Hardware / Getting SPI to work on VNC2
« on: August 24, 2022, 02:31:39 PM »
I'm getting conflicting information regarding the SPI on the VNC2 (32-pin). Some doc suggests crazy 13 clocks/byte stuff. Other doc suggests 8 clocks/byte as is normal.
Does anybody out there have DIRECT experience using the SPI on the VNC2?
Also, this Full Duplex / Half Duplex / Unmanaged mode stuff is "new". It's NOT normal SPI. Normal SPI is I guess what this FTDI VNC2 doc would call unmanaged. It ***ought*** to be possible to simply exchange 8-bit words using 8 clock bits within a SS low period, and exchange an even multiple 8-bit words consecutively with an even multiple of 8 clocks within a single SS low period. (Chip Datasheet: https://www.ftdichip.com/old2020/Support/Documents/DataSheets/ICs/DS_vinculum-II.pdf Please See Figures 6.12, 6.3, 6.5, 6.6, 6.7 in that order!
Does anybody out there have DIRECT experience with this?
At this point I don't care at all what V2DAP or any other FTDI firmware does. I want to know what the actual hardware does. Does the actual hardware do the normal multiple-decades old SPI stuff, or was the chip hardware designer a bit messed up in the head, thus making their SPI incompatible with almost everything else out there? (Sorry, my frustration is leaking out.) It's a shame that only a single figure in the chip doc shows the actual SPI clock timing...
Thanks very much.
Does anybody out there have DIRECT experience using the SPI on the VNC2?
Also, this Full Duplex / Half Duplex / Unmanaged mode stuff is "new". It's NOT normal SPI. Normal SPI is I guess what this FTDI VNC2 doc would call unmanaged. It ***ought*** to be possible to simply exchange 8-bit words using 8 clock bits within a SS low period, and exchange an even multiple 8-bit words consecutively with an even multiple of 8 clocks within a single SS low period. (Chip Datasheet: https://www.ftdichip.com/old2020/Support/Documents/DataSheets/ICs/DS_vinculum-II.pdf Please See Figures 6.12, 6.3, 6.5, 6.6, 6.7 in that order!
Does anybody out there have DIRECT experience with this?
At this point I don't care at all what V2DAP or any other FTDI firmware does. I want to know what the actual hardware does. Does the actual hardware do the normal multiple-decades old SPI stuff, or was the chip hardware designer a bit messed up in the head, thus making their SPI incompatible with almost everything else out there? (Sorry, my frustration is leaking out.) It's a shame that only a single figure in the chip doc shows the actual SPI clock timing...
Thanks very much.