FTDI Community
General Category => Discussion - Hardware => Topic started by: Rajesh@sys on March 15, 2019, 01:27:33 PM
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hi,
RXE and TXE signals are dependent or independent ?
can TXE and RXE go LOW at same time.
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Hello,
Do you mean RXF# and TXE#?
RXF#:
When high, do not read data from the FIFO. When low, there is data available in the FIFO which can be read by driving RD# low. When in synchronous mode, data is transferred on every clock that RXF# and RD# are both low. Note that the OE# pin must be driven low at least 1 clock period before asserting RD# low.
TXE#:
When high, do not write data into the FIFO. When low, data can be written into the FIFO by driving WR# low. When in synchronous mode, data is transferred on every clock that TXE# and WR# are both low.
A write operation can be started when TXE# is low.
A read operation is started when the chip drives RXF# low.
Best Regards,
FTDI Community
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thank you very much for your reply.
<RXF#:
When high, do not read data from the FIFO. When low, there is data available in the FIFO which can be read by driving RD# low. When in synchronous mode, data is transferred on every clock that RXF# and RD# are both low. Note that the OE# pin must be driven low at least 1 clock period before asserting RD# low.
TXE#:
When high, do not write data into the FIFO. When low, data can be written into the FIFO by driving WR# low. When in synchronous mode, data is transferred on every clock that TXE# and WR# are both low.
A write operation can be started when TXE# is low.
A read operation is started when the chip drives RXF# low. >
i know this one.
are they independent ??
can we perform READ and WRITE at same time ?
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Hello,
This is not possible because D0 to D7 bidirectional FIFO data are used for both read and write operations.
Best Regards,
FTDI Community
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Thank you :)