FTDI Community

Please login or register.

Login with username, password and session length.
Advanced Search  

News:

Welcome to the FTDI Community!

Please read our Welcome Note

Technical Support enquires
please contact the team
@ FTDI Support


New Bridgetek Community is now open

Please note that we have created the Bridgetek Community to discuss all Bridgetek products e.g. EVE, MCU.

Please follow this link and create a new user account to get started.

Bridgetek Community

Show Posts

You can view here all posts made by this member. Note that you can only see posts made in areas to which you currently have access.

Messages - JMLsystem

Pages: [1]
1
Discussion - Hardware / Re: FT4222H reset and Configuration
« on: September 06, 2019, 04:41:47 PM »
Responses from FTDI technical Support :

1) "Does the EEPROM chip need to programmed before using the FT4222H ?
  -> The OTP does not need to programmed before using the FT4222H.
      Please evaluate using the UMFT4222EV : this module OTP is not pre-programmed.

2) "What is the minimum low time for the RESETN signal before VCCIO rising ?"
  ->  The  minimum low time is about 5.2us


2
Discussion - Hardware / FT4222H reset and Configuration
« on: September 03, 2019, 09:59:40 AM »
I'm using the FT4222H on the motherboard of our product and i have some questions about it :

1) What is the minimum low time for the RESETN signal before VCCIO rising ?

2) Does the EEPROM chip need to programmed before using the FT4222H ?
 Because when my Host access to the FT4222 through the USB port,
 in QSPI Master mode (DCNF[1:0]=00 or 11)
 i can see the SS0O chip select going low during 1.92µs,
 but there are no SCLK clock pulse, no MISO/MOSI/IO[2:3] changes (there are stuck à 0V)

Pages: [1]