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Topics - alrsir

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Discussion - Hardware / FT601 on Cyclone V GX
« on: November 27, 2018, 02:11:06 PM »
Hi,
I am considering using the FT601 chip with Cyclone V GX FPGA. I have purchased the Cyclone V GX starter kit and UMFT601A USB3 kit. Now I am trying to synthesize the provided examples to be used with the kit on Quartus Prime ver 17. I have noticed that all the examples have timing constrains violations if synthesized for 7 speed grade FPGA which is installed on the GX kit.  I was only able to remove timing violations if I choose 6 speed grade chip, but it is not the chip which is used on the Altera/Intel kit.

Is there something wrong with the examples?

Thanks,
Alexey.

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