FTDI Community

Please login or register.

Login with username, password and session length.
Advanced Search  

News:

Welcome to the FTDI Community!

Please read our Welcome Note

Technical Support enquires
please contact the team
@ FTDI Support


New Bridgetek Community is now open

Please note that we have created the Bridgetek Community to discuss all Bridgetek products e.g. EVE, MCU.

Please follow this link and create a new user account to get started.

Bridgetek Community

Author Topic: FT601Q: 245 Synchronous FIFO mode. TXE_N indicator width.  (Read 65 times)

atom1477

  • Newbie
  • *
  • Posts: 8
    • View Profile
FT601Q: 245 Synchronous FIFO mode. TXE_N indicator width.
« on: October 11, 2019, 08:46:58 AM »

Are TXE_N really indicates only 1-byte/8-bit free space in FIFO?

FT601Q have 32-bit input/output port. To achieve full throughput, all of this 32 bits should be used.
But:

So it looks like that only 1-byte/8-bit input is correct to manage FIFO. Wider input, with only 1-byte TXE_N indication, could cause overflow the FIFO.
Is it even possible to achieve transmit without losing some of data, in this mode and 32-input?
I misunderstand something, or it is error in the structure of FT601Q, not described in the FT601Q errata?
Or maybe it is error in description, and TXE_N really indicates free words, not free bytes?
Logged

FTDI Community

  • Administrator
  • Sr. Member
  • *****
  • Posts: 326
    • View Profile
Re: FT601Q: 245 Synchronous FIFO mode. TXE_N indicator width.
« Reply #1 on: October 14, 2019, 08:58:06 AM »

Hello,

In 245 Synchronous FIFO mode the TXE_N is an output signal, Transmit FIFO Empty. It is active low and when active it indicates the Transmit FIFO has space and it is ready to receive data from the FIFO master. It indicates there is a minimum, or at least 1 byte of space available.

By the way if you contact support1@ftdichip.com we have a new driver I can provide to you.

Thanks,
FTDI Community
Logged

atom1477

  • Newbie
  • *
  • Posts: 8
    • View Profile
Re: FT601Q: 245 Synchronous FIFO mode. TXE_N indicator width.
« Reply #2 on: October 20, 2019, 01:15:47 PM »

But this not answers my question.
Could You clarify that 32-bit wide IO is possible or not in this mode?
Logged

FTDI Community

  • Administrator
  • Sr. Member
  • *****
  • Posts: 326
    • View Profile
Re: FT601Q: 245 Synchronous FIFO mode. TXE_N indicator width.
« Reply #3 on: October 21, 2019, 04:18:01 PM »

Hello,

Perhaps due to unaligned read/write.

An aligned write is a write on the FIFO interface with all byte enables selected, i.e. on a 16-bit interface, an aligned write is 16-bits wide and on a 32-bit interface, an aligned write is 32-bits wide.
 
An unaligned write is a write on the FIFO interface that is not as wide as the interface, i.e. on a 16-bit interface, an unaligned write is a single byte write and on a 32-bit interface, an unaligned write is 1, 2, or 3 bytes.
 
An aligned read is a read from the FIFO interface when the slave asserts all byte enables. On a 16-bit interface, an aligned read is 16-bits wide and on a 32-bit interface, an aligned read is 32-bits wide
 
An unaligned read is a read from the FIFO interface that is not as wide as the interface, i.e. on a 16-bit interface, an unaligned read is a single byte read and on a 32-bit interface, an unaligned read is 1, 2, or 3 bytes. An unaligned read from the slave always signals that it is a short packet

Further details can be found in AN_421 - https://www.ftdichip.com/Support/Documents/AppNotes/AN_412_FT600_FT601%20USB%20Bridge%20chips%20Integration.pdf

Regards,
FTDI Community
Logged

atom1477

  • Newbie
  • *
  • Posts: 8
    • View Profile
Re: FT601Q: 245 Synchronous FIFO mode. TXE_N indicator width.
« Reply #4 on: October 22, 2019, 10:19:05 AM »


Perhaps due to unaligned read/write.

Not only. USB side of FTDI sends data to PC serially, not parallely.
So even when data is written to FTDI aligned (32 bit), it may disappears from FIFO byte by byte.
When I write alligned 1024 words of 32 bits, I fill all the FIFO. But FIFO will be send
via USB byte by byte, right?
It depends on what FIFO occupancy meter is used.
TXE_N indicates 1 byte, and nonaligned writes are supported, so I guess that meter is 1 byte, and counts to 4095. Every 32-bit (aligned) write to FTDI increase FIFO occupancy by 4. But continuous transmission via USB will decrease FIFO occupancy by 1 or by 4. It depends on FTDI hardware, which is not described in datasheet.
If it decreased by 1, it will cause issue that I asking for. Even when I write only aligned 32-bit data, FTDI
may sends it byte by byte indicating 1 byte free space in FIFO.
In this situation TXE_N
is useless, because it don't give enough information to next 32-bit aligned write. To do 32-bit writes, a 4-bytes free space information is necessary.

But in Your scenario, when nonaligned writes are made, the same issue appear even when USB transmission decreasing FIFO occupancy by 4.
So I'm surprised that You made TXE_N as 1-byte free space indicator, not as 4-byte free space indicator.
Unless it's a datasheet error and it's actually a 4-byte indicator. So I ask about that.
Logged