FTDI Community

Please login or register.

Login with username, password and session length.
Advanced Search  

News:

Welcome to the FTDI Community!

Please read our Welcome Note

Technical Support enquires
please contact the team
@ FTDI Support


New Bridgetek Community is now open

Please note that we have created the Bridgetek Community to discuss all Bridgetek products e.g. EVE, MCU.

Please follow this link and create a new user account to get started.

Bridgetek Community

Author Topic: FTDI GPIO parasitic current  (Read 8172 times)

jefflongo

  • Newbie
  • *
  • Posts: 3
    • View Profile
FTDI GPIO parasitic current
« on: April 06, 2020, 10:45:35 PM »

Hello,

I am using FT232R in an application where the chip may not have power. In this case, there is a signal which is pulled-up connected to CBUS3. Could this pull-up parasitically power on the chip?

Best,
Jeff
Logged

FTDI Community

  • Administrator
  • Hero Member
  • *****
  • Posts: 892
    • View Profile
Re: FTDI GPIO parasitic current
« Reply #1 on: April 08, 2020, 04:54:59 PM »

Hello Jeff,

Power should always be applied to the device when in use.
VCC and VCCIO should be applied at the same time.

When the board is powered off, do not apply any voltages to the IC pins.
There might be some current draw but this is not specified because the device can be in unknown states.

It may be advisable to add a buffer or MOSFET gated with PWREN# to avoid such behaviour.

Best Regards,
FTDI Community
Logged